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NCP1560 Product Preview Full Featured Voltage Mode PWM Controller
The NCP1560 PWM controller contains all of the features and flexibility needed to implement voltage-mode control for modern high performance power converters. This device cost effectively reduces system part count with the inclusion of a high-voltage start-up regulator that operates over a wide input range of 33 V to 150 V. The NCP1560 provides two control outputs, OUT1 which controls the main PWM switch and OUT2 with adjustable over-lap delay, which can control a synchronous rectifier. Other distinctive features include: two mode over-current protection, line under/over voltage lockout, fast line feed-forward, soft-start and a maximum duty cycle clamp.
Features http://onsemi.com MARKING DIAGRAM
16 SO-16 D SUFFIX CASE 751B 1 1 A WL Y WW = Assembly Location = Wafer Lot = Year = Work Week NCP1560DR2 AWLYWW
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Internal High Voltage Start-up Regulator Dual Control Outputs with Adjustable Over-Lap Delay Single Resistor Oscillator Frequency Setting Fast Line Feed-Forward Line Under/Over Voltage Lockout Dual Mode Over-Current Protection Programmable Maximum Duty Cycle Control Maximum Duty Cycle Proportional to Line Voltage Programmable Soft-Start Precision Reference Telecommunication Power Converters Industrial Power Converters High Voltage Power Modules +42 V Automotive Systems Control Driven Synchronous Rectifier Power Converters
ORDERING INFORMATION
Device NCP1560DR2 Package SO-16 Shipping 2500 Units/Reel
Typical Applications
This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice.
(c) Semiconductor Components Industries, LLC, 2001
1
November, 2001 - Rev. 1
Publication Order Number NCP1560/D
NCP1560
Vin Vaux GND
Start-up Regulator Thermal Shutdown
REF
5 V REF
UV_OV Protection CS C_SKIP_SET RT OSC FF_SET TP_Ramp Td Set
Vea Modulator SS Max Duty Set
DELAY LOGIC
OUT1 OUT2
Figure 1. Simplified Block Diagram
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1 Vin 12 mA AUX 16 CAUX 11 V/7 V 14 GND Thermal Shutdown Vin UV_OV 2 1.49 V + - + - 3.60 V Level Shift Cycle Skip Timer Clock 5 CS + - 0.6 V + - 0.5 V 6 A Disable_ss Soft Start - + STOP Vin RFF Clock FF_Set RT RT TP_Ramp VEA 10 VREF RMDP 4 7 3 Buffer + - 2V 20 K + - 8 RP 0 Open Open RMDP Max Duty % Open Open 100 K 60 80 X100 Max Duty 60 - 80% PWM Oscillator OSC_Ramp FF_Ramp OUT2 Td OUT1 Td Disable_ss Disable_Vref Set S Dominant Reset Q Latch R STOP 15 - + Disable
Vout 7 11 Vaux
Disable_Vref OUT I One Shot Pulse O (250 ns)
DIS
Voltage Reference
11
5 V_Ref
RD
Td_Set
C_Skip_Set 6 CSKIP
S Dominant Reset Q Latch R
DIS Delay Logic OUT1 OUT2
SS CSS
9
Max_Duty Set RP
Figure 2. NCP1560 Block Diagram
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PIN DESCRIPTION
Pin 1 2 3 4 Name Vin UV_OV TP_Ramp FF_SET Description Source Input Voltage Input Undervoltage and Overvoltage shutdown. Test point provided for the Feed Forward Ramp signal. An external resistor between Vin and this pin adjusts the amplitude of the FF_Ramp in proportion to Vin and R. Current Sense input Application Information Input range: 33 V to 150 V. An external divider from the power converter source input must be scaled >1.49 volts and < 3.60 volts over the operational range. Internally this signal is compared to Vea. By varying the PWM ramp amplitude in proportion to the line voltage changes in loop bandwidth resulting from line voltage changes are eliminated. If CS exceeds 0.5 volt the outputs will go into a Cycle by Cycle current limit. If CS exceeds 0.6 volts the outputs will be disabled for a period determined by the Current Sense Fault Timer. A softstart will follow at the conclusion of the fault timer. An external capacitor sets the shutdown period. Range: 68 pF = 12 ms, 6800 pF = 1.2 ms Resistance Range 68 K = 500 KHz 390 K = 100 KHz Resistance Range 0 Ohms = 60% Open = 80% given the FF_Ramp of 2.0 V peak (low line). An external capacitor and the internal 6.0 mA current source, set the softstart ramp. The capacitor voltage sets a maximum duty cycle clamp from 0 to 2.0 volts (0 to 100% Duty). There is no error amplifier included within this controller. The error amplifier is typically secondary side referenced while the controller is primary side referenced. Maximum output current: 10 mA. Time delay (Td) Rd open = 250 nS (Max Delay) Rd (60 K) = 25 nS (Min Delay) OUT2 can be used to drive a synchronous rectifier.
5
CS
6
C_SKIP_SET
An external capacitor sets the shutdown period after 0.6 V CS event. A single external resistor between this pin and GND sets the fixed oscillator frequency. An external resistor between this pin and GND sets the maximum allowable Duty cycle. Softstart control
7
RT
8
MAX_DUTY_SET
9
SS
10
Vea
Input from an external error amplifier.
11 12
5.0 V_REF Td_Set
Precision 5.0 volt reference output. An external resistor between Vref and this pin sets the leading edge and trailing edge time delay between OUT1 and OUT2. Output of the PWM controller with leading edge and a trailing edge time delay of (Td). Return Output of the PWM controller. Auxiliary bias power. Upon turn-on an internal current source supplies bias power. An external slave winding then continues supplying bias power.
13
OUT2
14 15 16
GND OUT1 AUX
OUT1 main PWM output. An internal current source supplies 12 mA until Vaux reaches 11 volts. An external capacitor is required to holdup Vaux above 7.0 volts while the converter starts. Typically an external slave winding then provides power to the control circuits.
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MAXIMUM RATINGS (Notes 1 & 2)
Rating Vin to GND Vaux to GND All Other Inputs to GND 5.0 V Reference Output Current OUT1, OUT2 Output Current Operating Junction Temperature Storage Temperature Range Power Dissipation at TA = 25C Symbol Vin Vaux - IREF IOUT1, IOUT2 TJ Tstg PD Value 150 16 - 10 20 -40 to +140 -55 to +150 0.88 Unit V V V mA mA _C _C W
Thermal Resistance, Junction to Case RJA 130 _C/W 1. Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum-rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 2. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL-STD-883, Method 3015. Machine Model Method 200 V.
ELECTRICAL CHARACTERISTICS (TA = Tlow to Thigh, Vin = 48 V, Vaux = 12 V, RT = 100 K, Cft = 6800 pF, Rd = 60 K,
RFF = 464 K) Characteristic Reference REF Output Voltage REF Voltage Regulation Vaux Supply Vaux Current Source Vaux Current Source Disable Vaux Undervoltage Lockout Voltage Startup Regulator Leakage Supply Current (laux) Shutdown Current (laux) Input UV/OV Shutdown Undervoltage Shutdown (increasing) Undervoltage Shutdown Hysteresis Overvoltage Shutdown (increasing) Overvoltage Shutdown Hysteresis Current Limit ILIM Delay to Output (TA = 25_C) Cycle-by-Cycle Threshold Voltage Cycle Skip Threshold Voltage Cycle Skip Program Time Delay - 1.2 - mS - 0.47 0.57 - 0.5 0.6 150 0.53 0.63 nS V V 1.43 - 3.46 - 1.49 0.16 3.60 0.16 1.55 - 3.74 - V V V V TA = 25C, Vin = 150 V Vea = 0 V Vuv/ov = 0 V Vaux t 11 V* 11 - - - - - 12 11 7.0 - - - - - - 50 5.0 2.5 mA V V mA mA mA VREF Iref = 0 mA Iref = 0 to 10 mA 4.9 - 5.0 50 5.1 - V mV Symbol Conditions Min Typ Max Unit
*Non-continuous rating. Vaux current source will supply 12 mA over the input voltage range of 33 V to 150 V. However package thermal restrictions apply.
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ELECTRICAL CHARACTERISTICS (continued) (TA = Tlow to Thigh, Vin = 48 V, Vaux = 12 V, RT = 100 K, Cft = 6800
pF, Rd = 60 K, RFF = 464 K) Characteristic Softstart Charge Current Discharge Current Oscillator Frequency PWM Comparator Input Bias Current Delay to Output (TA = 25_C) Feedforward FF Ramp Amplitude Max Duty Program Max Duty 60% Max Duty 80% Output Section Output High Saturation Output Low Saturation Rise Time Fall Time Time Delay Set Time Delay Max Time Delay Min Thermal Shutdown Thermal Shutdown Temperature Tsd - 150 - C Td(max) Td(min) Rd = open, TA = 25C Rd = 60 K, TA = 25C 225 20 250 25 275 30 nS nS Iout = 10 mA Iout = -10 mA CL = 100 pF CL = 100 pF - - - - 11.4 0.25 20 12 - - - - V V nS nS Rp = 0 Ohms, Vin = 36 V Rp = open, Vin = 36 V 57 76 60 80 63 84 % % - 2.7 - V - - 1.0 - - 200 nA nS 285 300 315 KHz 5.0 - 6.0 10 7.0 - mA mA Symbol Conditions Min Typ Max Unit
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DETAILED OPERATING DESCRIPTION Reference The NCP1560 PWM controller contains all of the features and flexibility needed for implementation of voltage-mode The NCP1560 provides a precision reference output of control for modern high performance power converters. 5 volts. This output should be locally bypassed with a 0.1 mF This device cost effectively reduces system part count with ceramic capacitor. The maximum current available from this the inclusion of a high-voltage start-up regulator. The output is 10 mA. NCP1560 provides two control outputs, OUT1 which Current Limit controls the main PWM switch and OUT2 with adjustable over-lap delay, which can control a synchronous rectifier The NCP1560 contains two levels of over current switch. Other distinctive features include: two mode protection. If the voltage on the CS pin exceeds 0.5 volt the over-current protection, line under/over voltage lockout, present cycle is terminated and the outputs are disabled. If fast line feed-forward, soft-start and a maximum duty cycle the voltage on the CS pin exceeds 0.6 volts, the controller clamp. The Functional Block Diagram is shown in Figure 1. will disable the outputs, enable the Cycle Skip Timer and The NCP1560 is designed for Voltage-Mode Control discharge the softstart capacitor. The outputs will remain converters. The features included in the NCP1560 enable all disabled until the Cycle Skip Timer completes, then a of the advantages of Current-Mode Control, fast line softstart will commence. The duration of the Current Sense feed-forward, and cycle by cycle current limit. It eliminates Fault Timer is set by an external capacitor. The range of the disadvantages of low power jitter, slope compensation capacitor (time set) is 68 pF (12 ms) to 6800 pF (1.2 mS). A and noise susceptibility. Finally the dual outputs of the complete softstart will commence after the current sense NCP1560 allow for optimum control of a synchronous fault timer completes. rectifier switch. Oscillator and Ramp Feed-Forward High Voltage Start-up Regulator The NCP1560 oscillator is set by a single external resistor The NCP1560 contains an internal high voltage current connected between the RT pin and return. Internally there source. This current source is set to 12 mA. When the line are two ramp voltages generated by the oscillator. The voltage is in range, the current source is enabled and sources OSC_Ramp is a fixed amplitude ramp of 0 to 1.5 volts. This current into an external capacitor connected to the Vaux pin. ramp is used for the softstart comparator and as a basis for When the voltage on the Vaux pin reaches 11 V the controller the Feed Forward ramp (FF_Ramp). The amplitude of the outputs are enabled and the internal current source is FF ramp varies in proportion to the voltage on the FF_SET disabled. The Vaux voltage will then transition to the pin. The FF_Ramp is used for the PWM comparator and the converter self bias voltage. The start-up regulator will Max Duty Cycle comparator. The amplitude of the remain off until the Vaux voltage falls below 7.0 V. At that FF_Ramp is normally set to vary from 1.5 to 3.0 volts for a time the outputs will be disabled until the Vaux pin again corresponding 2:1 change in line voltage. An external reaches 11 V. The external Vaux capacitor must be sized such resistor between the FF_SET pin and the line sets the that the self-bias will maintain a Vaux voltage greater than proportion to which the ramp amplitude changes with line 7.0 V during initial start-up. During a fault mode when the voltage. converter self bias is inactive, external current draw on the Maximum Duty Cycle Vaux line should be limited as to not exceed the maximum power dissipation of the controller. A dedicated internal comparator limits the maximum output duty cycle. The Feedforward ramp is compared to a Input Under/Over Voltage Shutdown fixed voltage configured by the Max Duty Cycle pin. Since The NCP1560 contains a line under/over voltage shut the amplitude of the Feedforward ramp increases with down circuit. An external voltage divider sets the increasing line voltage the maximum duty cycle will then operational range of the converter. The divider must be set decrease with increasing line voltage, which is a desirable for a voltage at the under/over voltage pin to be greater than feature. If the Max Duty Cycle pin is left open the voltage 1.49 V and less than 3.60 V. If the Under voltage threshold present at the Max Duty Cycle comparator will be 1.6 volts, is not met, all functions of the controller are disabled except which will correspond to a maximum duty cycle of 80% the bias (Vaux) regulator and the controller will be in a low when the FF_Ramp amplitude is at 2.0 volts. If the Max power state, < 500 mA. If the Over voltage threshold is Duty Cycle pin is shorted to return the voltage present at the exceeded, OUT1 and OUT2 will be disabled and the Max Duty Cycle comparator will be 1.2 volts, which will softstart capacitor will be discharged. correspond to a maximum duty cycle of 60% when the The under/over voltage pin can also be used to implement FF_Ramp amplitude is 2.0 volts. If the Max Duty Cycle pin a remote enable/disable function. By shorting the over/under is connected to Vref, the maximum duty cycle feature will pin to ground, the converter can be disabled. The internal bias be disabled and the maximum duty cycle will approach regulator will continue to operate varying between 7.0 and 11 100%. If the FF_Ramp amplitude increases to 4.0 volts as a volts. All other functions will be disabled.
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NCP1560
result of the line increasing the maximum duty cycle will then decrease to 40% or 30%, respectively, depending upon the Maximum Duty Set pin configuration. PWM Comparator The PWM comparator compares the Feedforward ramp to the voltage presented at the Vea pin. There is a 0.65 V (diode) offset between the Vea pin and the PWM comparator. The output of an external error amplifier generally drives the Vea pin. The comparator polarity is such that 0.65 volts or less on the Vea pin will cause a Zero duty cycle. Softstart The softstart feature allows the converter to gradually reach the initial steady state operating point, thus reducing start-up stresses and surges. Upon power on, a 6.0 mA current is sourced out of the softstart pin into an external capacitor. The capacitor voltage will begin to ramp up. The voltage on the softstart pin is compared to a 2.0 V Oscillator Ramp signal and will act to reduce the maximum duty cycle until the capacitor voltage ramps up. In the event of a fault, line under/over voltage or current cycle skip, the softstart pin will discharge the external capacitor and disable the output drivers. When the fault condition is no longer present a softstart will be exercised again. OUT1, OUT2 and Time Delay The NCP1560 provides two in-phase outputs, OUT1 and OUT2. However, OUT2 always precedes OUT1 at any low to high transition and OUT1 always precedes OUT2 at any high to low transition. The leading and trailing time delays are equal and set by the Time Delay pin. An open circuit on the Time Delay pin will cause the maximum delay of 500 nS. A 60 K resistor between the Time Delay pin and 5.0 V_REF will cause the minimum delay of 50 nS. Generally, OUT1 controls the main switching element. OUT2 once inverted can drive the free-wheeling synchronous rectifier switching element. Thermal Protection Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event the maximum junction temperature is exceeded. When activated, typically at 150 degrees Celsius, the controller is forced into a low power reset state, disabling the output drivers and the bias regulator. This feature is provided to prevent catastrophic failures from accidental device overheating.
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NCP1560
Notes
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NCP1560
Notes
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PACKAGE DIMENSIONS
SO-16 D SUFFIX CASE 751B-05 ISSUE J
-A-
16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
-B-
1 8
P
8 PL
0.25 (0.010)
M
B
S
G F
K C -T-
SEATING PLANE
R
X 45 _
M D
16 PL M
J
0.25 (0.010)
TB
S
A
S
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NCP1560
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative.
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NCP1560/D

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